W9412G6KH-5

Description

W9412G6KH is a CMOS Double Data Rate synchronous dynamic random access memory (DDR SDRAM); organized as 2M words* 4 banks * 16 bits. W9412G6KH delivers a data bandwidth of up to 400M words per second. To fully comply with the personal computer industrial standard, W9412G6KH is sorted into the following speed grades: -5, -5I and -6I. The -5/-5I grades are compliant to the DDR400/CL3 specification (the -5I industrial grade which is guaranteed to support -40°C ≤ TA ≤ 85°C). The -6I industrial grade is compliant to the DDR333/CL3 specification which is guaranteed to support -40°C ≤ TA ≤ 85°C. All Inputs reference to the positive edge of CLK (except for DQ, DM and CKE). The timing reference point for the differential clock is when the CLK and CLK signals cross during a transition. Write and Read data are synchronized with the both edges of DQS (Data Strobe). By having a programmable Mode Register, the system can change burst length, latency cycle, interleave or sequential burst to maximize its performance. W9412G6KH is ideal for any high performance applications.

Feature

• 2.5V ± 0.2V Power Supply for DDR400/333 

• Up to 200 MHz Clock Frequency  Double Data Rate architecture; two data transfers per clock cycle 

• Differential clock inputs (CLK and CLK ) 

• DQS is edge-aligned with data for Read; center-aligned with data for Write 

• CAS Latency: 2, 2.5 and 3 

• Burst Length: 2, 4 and 8 

• Auto Refresh and Self Refresh 

• Precharged Power Down and Active Power Down  Write Data Mask 

• Write Latency = 1 

• 15.6µS Refresh interval (4K/64 mS Refresh) 

• Maximum burst refresh cycle: 8 

• Interface: SSTL_2 

• Packaged in TSOP II 66-pin, using Lead free materials with RoHS compliant

Block diagram

W9412G6KH-5

Description

W9412G6KH is a CMOS Double Data Rate synchronous dynamic random access memory (DDR SDRAM); organized as 2M words* 4 banks * 16 bits. W9412G6KH delivers a data bandwidth of up to 400M words per second. To fully comply with the personal computer industrial standard, W9412G6KH is sorted into the following speed grades: -5, -5I and -6I. The -5/-5I grades are compliant to the DDR400/CL3 specification (the -5I industrial grade which is guaranteed to support -40°C ≤ TA ≤ 85°C). The -6I industrial grade is compliant to the DDR333/CL3 specification which is guaranteed to support -40°C ≤ TA ≤ 85°C. All Inputs reference to the positive edge of CLK (except for DQ, DM and CKE). The timing reference point for the differential clock is when the CLK and CLK signals cross during a transition. Write and Read data are synchronized with the both edges of DQS (Data Strobe). By having a programmable Mode Register, the system can change burst length, latency cycle, interleave or sequential burst to maximize its performance. W9412G6KH is ideal for any high performance applications.

Feature

• 2.5V ± 0.2V Power Supply for DDR400/333 

• Up to 200 MHz Clock Frequency  Double Data Rate architecture; two data transfers per clock cycle 

• Differential clock inputs (CLK and CLK ) 

• DQS is edge-aligned with data for Read; center-aligned with data for Write 

• CAS Latency: 2, 2.5 and 3 

• Burst Length: 2, 4 and 8 

• Auto Refresh and Self Refresh 

• Precharged Power Down and Active Power Down  Write Data Mask 

• Write Latency = 1 

• 15.6µS Refresh interval (4K/64 mS Refresh) 

• Maximum burst refresh cycle: 8 

• Interface: SSTL_2 

• Packaged in TSOP II 66-pin, using Lead free materials with RoHS compliant

Block diagram