IS61WV51216EDBLL-{attr}0{/attr}简介

The ISSI IS61WV51216EDALL and IS61/64WV51216EDBLL are high-speed, 8M-bit static RAMs organized as 512K words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices.When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. The device is packaged in the JEDEC standard 44-pin TSOP Type II and 48-pin Mini BGA (6mm x 8mm).

IS61WV51216EDBLL-10TLI参数

FEATURES

• High-speed access times: 8, 10, 20 ns

• High-performance, low-power CMOS process

• Multiple center power and ground pins for greater noise immunity

• Easy memory expansion with CE and OE options

• CE power-down

• Fully static operation: no clock or refresh required

• TTL compatible inputs and outputs

• Single Power Supply

 – Vdd = 1.65V to 2.2V (IS61WV51216EDALL)

 – Vdd = 2.4V to 3.6V (IS61/64WV51216EDBLL)

• Packages available:

         – 48-ball miniBGA (6mm x 8mm)

– 44-pin TSOP (Type II)

• Industrial and Automotive Temperature Support

• Lead-free available

• Data control for upper and lower bytes

IS61WV51216EDBLL-10TLI简介

The ISSI IS61WV51216EDALL and IS61/64WV51216EDBLL are high-speed, 8M-bit static RAMs organized as 512K words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. The device is packaged in the JEDEC standard 44-pin TSOP Type II and 48-pin Mini BGA (6mm x 8mm).

IS61WV51216EDBLL-10TLI参数

FEATURES

• High-speed access times: 8, 10, 20 ns

• High-performance, low-power CMOS process

• Multiple center power and ground pins for greater noise immunity

• Easy memory expansion with CE and OE options

• CE power-down

• Fully static operation: no clock or refresh required

• TTL compatible inputs and outputs

• Single Power Supply

 – Vdd = 1.65V to 2.2V (IS61WV51216EDALL)

 – Vdd = 2.4V to 3.6V (IS61/64WV51216EDBLL)

• Packages available:

         – 48-ball miniBGA (6mm x 8mm)

 – 44-pin TSOP (Type II)

• Industrial and Automotive Temperature Support

• Lead-free available

• Data control for upper and lower bytes