LAN9220-ABZJ

10/100 Base-T/TX以太网控制器，16位接口

LAN9220是一款功能齐全的单芯片10/100以太网控制器，专为需要性能、灵活性、易于集成和系统成本控制的嵌入式应用而设计。LAN9220完全符合IEEE 802.3 10BASE-T和802.3u 100BASE-TX标准，并支持HP Auto-MDIX。LAN9220的可变电压I/O信号适应低电压I/O信号，而不需要电压电平移位器。

LAN9220包括一个集成的以太网MAC和PHY，具有高性能sram样从接口。简单，但功能强大的主机总线接口提供了一个无胶连接到最常见的16位微处理器和微控制器，以及32位微处理器与16位外部总线。集成的校验和卸载引擎能够自动生成接收和传输以太网帧的16位校验和，从CPU中卸载任务。LAN9220还包括大型发送和接收数据fifo，以适应高延迟应用。此外，LAN9220内存缓冲体系结构通过优化数据包粒度，允许高效地使用内存资源。

The LAN9220 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required.   The LAN9220 is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant, and supports HP Auto-MDIX.   The variable voltage I/O signals of the LAN9220 accommodate lower voltage I/O signaling without the need for voltage level shifters.

The LAN9220 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface.   The simple, yet highly functional host bus interface provides a glue-less connection to most common 16-bit microprocessors and microcontrollers as well as 32-bit microprocessors with a 16-bit external bus.   The integrated checksum offload engines enable the automatic generation of the 16-bit checksum for received and transmitted Ethernet frames, offloading the task from the CPU.   The LAN9220 also includes large transmit and receive data FIFOs to accommodate high latency applications.   In addition, the LAN9220 memory buffer architecture allows highly efficient use of memory resources by optimizing packet granularity.

LAN9220-ABZJ

10/100 Base-T/TX以太网控制器，16位接口

具有低CPU开销的高效架构

•易于接口大多数16位嵌入式CPU的

•1.8V至3.3V可变电压I/O适应宽范围的I/O信号没有电压电平移位器

•集成PHY与HP Auto-MDIX支持

•集成的校验和卸载引擎有助于降低CPU负载

•低引脚数和小尺寸封装，适用于小尺寸系统设计

•16位接口

•支持突发模式读取

•内部缓冲存储器可以存储超过200个数据包

•自动暂停和背压流量控制

•支持Slave-DMA

•中断引脚与可编程保持定时器

•降低系统成本，提高设计灵活性

•类似sram的接口很容易连接到大多数嵌入式CPU或SoC

•多种电源管理模式

•局域网唤醒

•魔术包唤醒

•唤醒指示灯事件信号

•链路状态变化

•完全符合IEEE 802.3/802.3u标准

集成以太网MAC和PHY

•支持10BASE-T和100BASE-TX

•全双工和半双工支持

•全双工流量控制

•反压半双工流量控制

•序言的生成和删除

•自动32位CRC生成和检查

•自动有效载荷填充和垫移除

•环回模式

一个48位的完美地址

•64个哈希过滤的组播地址

•传递所有组播

•混杂模式

•反滤波

•通过所有来料及状态报告

•禁用接收广播数据包

•支持HP Auto-MDIX

•自动协商

•支持能量检测断电

•简单，类似sram的接口

•16位数据总线

•16Kbyte FIFO灵活的TX/RX分配

一个可配置的主机中断

•小尺寸，56针QFN RoHS兼容封装

集成1.8V稳压器

•集成校验和卸载引擎

•混合尾端支持

•通用定时器

•可选EEPROM接口

•支持3状态led与可编程GPIO信号多路复用

•单3.3V电源与可变电压I/O

•0°C至70°C商用温度支持

应用程序:

有线，卫星和IP机顶盒

数字录像机

视频over IP解决方案，IP PBX和视频电话

无线路由器和接入点

音频分配系统

打印机，信息亭，安全系统

通用嵌入式应用

Product Features

Efficient architecture with low CPU overhead

• Easily interfaces to most 16-bit embedded CPU's

• 1.8V to 3.3V variable voltage I/O accommodates wide range of I/O signaling without voltage level shifters

• Integrated PHY with HP Auto-MDIX support

• Integrated checksum offload engine helps reduce CPU load

• Low pin count and small body size package for small form factor system designs

• 16-bit interface

• Burst-mode read support

• Internal buffer memory can store over 200 packets

• Automatic PAUSE and back-pressure flow control

• Supports Slave-DMA

• Interrupt Pin with Programmable Hold-off timer

• Reduces system cost and increases design flexibility

• SRAM-like interface easily interfaces to most embedded CPU's or SoC's

• Numerous power management modes

• Wake on LAN

• Magic packet wakeup

• Wakeup indicator event signal

• Link Status Change

• Fully compliant with IEEE 802.3/802.3u standards

• Integrated Ethernet MAC and PHY

• 10BASE-T and 100BASE-TX support

• Full- and Half-duplex support

• Full-duplex flow control

• Backpressure for half-duplex flow control

• Preamble generation and removal

• Automatic 32-bit CRC generation and checking

• Automatic payload padding and pad removal

• Loop-back modes

• One 48-bit perfect address

• 64 hash-filtered multicast addresses

• Pass all multicast

• Promiscuous mode

• Inverse filtering

• Pass all incoming with status report

• Disable reception of broadcast packets

• Supports HP Auto-MDIX

• Auto-negotiation

• Supports energy-detect power down

• Simple, SRAM-like interface

• 16-bit data bus

• 16Kbyte FIFO with flexible TX/RX allocation

• One configurable host interrupt

• Small form factor, 56-pin QFN RoHS Compliant package

• Integrated 1.8V regulator

• Integrated checksum offload engine

• Mixed endian support

• General Purpose Timer

• Optional EEPROM interface

• Support for 3 status LEDs multiplexed with Programmable GPIO signals

• Single 3.3V Power Supply with Variable Voltage I/O

• 0°C to 70°C Commercial Temperature Support

Applications:

Cable, satellite, and IP set-top boxes

Digital video recorders

Video-over IP solutions, IP PBX & video phones

Wireless routers & access points

Audio distribution systems

Printers, kiosks, security systems

General embedded applications