代理ISSI高速异步静态存储器IS61WV51216BLL-10TLI(图片)与3.3V供电的（512*16）RAM

512Kx16 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
 KEY FEATURES
 High-speed access time: 45ns, 55ns
 CMOS low power operation
– Operating Current: 36mA (max.)
– CMOS standby Current: 5.8uA (typ.)
 TTL compatible interface levels
 Single power supply
–1.65V-2.2V VDD (IS62/65WV51216GALL)
– 2.2V-3.6V VDD (IS62/65WV51216GBLL)
 Three state outputs
 Commercial, Indust{attr}1201{/attr}al and Automotive
temperature support
 Lead-free available
DESCRIPTION
The ISSI IS62/65WV51216GALL/BLL are high-speed, low
power, 8M bit static RAMs organized as 512K words by 16
bits. It is fabricated using ISSI's high-performance CMOS
technology.
This highly reliable process coupled with innovative circuit
design techniques, yields high-performance and low power
consumption devices. When CS1# is HIGH (deselected) or
when CS2 is LOW (deselected) or when CS1# is LOW,
CS2 is HIGH and both LB# and UB# are HIGH, the device
assumes a standby mode at which the power dissipation
can be reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE#) controls both writing and reading of the memory.
A data byte allows Upper Byte (UB#) and Lower Byte (LB#)
access.
The IS62/65WV51216GALL/BLL are packaged in the
JEDEC standard 48-Pin TSOP (TYPE I).

主要特点：

• High-speed access time: 
— 10, 12 ns 
• CMOS low power operation
• Low stand-by power: 
— Less than 5 mA (typ.) CMOS stand-by
• TTL compatible interface levels
• Single 3.3V power supply
• Fully static operation: no clock or refresh 
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• Lead-free available

引脚定义：